The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2020

Filed:

Dec. 13, 2017
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Zhao Cui, Shanghai, CN;

Eric Kwok Fung Yuen, Dublin, CA (US);

Guan Zhong Wang, Shanghai, CN;

Xinghui Duan, Shanghai, CN;

Giuseppe D'Eliseo, Caserta, IT;

Giuseppe Ferrari, Naples, IT;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/0873 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 12/0253 (2013.01); G06F 12/0292 (2013.01); G06F 12/0873 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7208 (2013.01); G06F 2212/7209 (2013.01);
Abstract

Devices and techniques for synchronizing NAND logical-to-physical table region tracking are described herein. Table region data structures for physical blocks are maintained. These structures include logical-to-physical (L2P) mapping table portions that point to the respective physical blocks. When garbage collection is performed on a block, table region structures for that block, and another (e.g., the next block to be garbage collected) are read to avoid loading L2P table regions that do not point to the block. If any of the read portions of the L2P table region fail to point to either the block or the other block, these L2P table portions are removed from the loaded table region data structures.


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