The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2020

Filed:

Jun. 27, 2018
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Veronica Sciriha, Munich, DE;

Georg Seidemann, Landshut, DE;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01L 49/02 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 28/10 (2013.01); H01L 23/5227 (2013.01); H01L 23/645 (2013.01); H01L 24/05 (2013.01); H01L 2224/0346 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05008 (2013.01); H01L 2224/05147 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19104 (2013.01); H01L 2924/3025 (2013.01);
Abstract

A system and method of providing a coil in an electronic communication device in is disclosed. Multiple dielectric layers are deposited and patterned on a semiconductor substrate or insulating mold compound. The dielectric layers provide conductive contact with a contact pad on the underlying structure. Shielding for the coil, including a seed layer covered by an insulating material, is disposed in a via of a lowermost of the dielectric layers. Grounding of the shielding seed layer is through a contact pad on the substrate or a trace between the dielectric layers. A coil is fabricated over the shielding and a solder mask deposited and patterned to cover and insulate the coil. The coil is fabricated in a via of a dielectric layer immediately below the solder mask or above this dielectric layer. Electrical contact is provided by multiple copper and seed layers in the solder mask and dielectric layers.


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