The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 16, 2020
Filed:
Feb. 06, 2019
Cypress Semiconductor Corporation, San Jose, CA (US);
Chun Chen, San Jose, CA (US);
Kuo Tung Chang, Saratoga, CA (US);
Yoram Betser, Mazkeret Batya, IL;
Shivananda Shetty, San Jose, CA (US);
Giovanni Mazzeo, Sacramento, CA (US);
Tio Wei Neo, Fremont, CA (US);
Pawan Singh, Santa Clara, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, a method for suppression of program disturb in a flash memory array is provided. The flash memory array comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). During a program memory operation, a first voltage, of a selected SG line, and a second voltage, of an unselected BL, are regulated independently of a power supply voltage of the flash memory array, where the first voltage is regulated in a first range of 0.9V to 1.1V and the second voltage is regulated in a second range of 0.4V to 1.2V.