The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 09, 2020

Filed:

Jun. 17, 2015
Applicant:

Floadia Corporation, Kodaira-shi, Tokyo, JP;

Inventors:

Yasuhiro Taniguchi, Kodaira, JP;

Yasuhiko Kawashima, Kodaira, JP;

Hideo Kasai, Kodaira, JP;

Yutaka Shinagawa, Kodaira, JP;

Ryotaro Sakurai, Kodaira, JP;

Kosuke Okuyama, Kodaira, JP;

Assignee:

FLOADIA CORPORATION, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/148 (2006.01); H01L 27/11521 (2017.01); H01L 27/11565 (2017.01); H01L 27/1157 (2017.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 27/11519 (2017.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11521 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11565 (2013.01); H01L 29/0684 (2013.01); H01L 29/1087 (2013.01);
Abstract

In the non-volatile semiconductor memory device, a mobile charge collector layer, a mobile charge collecting contact, a mobile charge collecting first wiring layer, an in-between contact between the mobile charge collector layers, and a mobile charge collecting second wiring layer are disposed adjacent to a floating gate. Thereby, without increasing areas of active regions in the non-volatile semiconductor memory device, the number of mobile charges collected near the floating gate is reduced. The non-volatile semiconductor memory device allows high-speed operation of a memory cell while reducing fluctuations in a threshold voltage of the memory cell caused by collection of the mobile charges, which are attracted from an insulation layer, near the floating gate.


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