The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 09, 2020
Filed:
Apr. 27, 2017
Applicant:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Inventors:
Assignee:
Siliconware Precision Industries Co., Ltd., Taichung, TW;
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/56 (2006.01); H01L 23/29 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/563 (2013.01); H01L 23/293 (2013.01); H01L 23/3142 (2013.01); H01L 23/3675 (2013.01); H01L 23/49827 (2013.01); H01L 24/06 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/29 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/2919 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2924/35121 (2013.01);
Abstract
A semiconductor package is provided, which includes: a substrate having a metal pattern layer; a semiconductor die formed on the substrate; and an underfill filled between the substrate and the semiconductor die. At least an opening is formed in the metal pattern layer to reduce the area of the metal pattern layer on the substrate, thereby reducing the contact area between the underfill and the metal pattern layer, hence eliminating the underfill delamination.