The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Jul. 23, 2018
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Jian Gang Lu, Shanghai, CN;

Fu Cheng Chen, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/78 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 21/7806 (2013.01); H01L 23/49816 (2013.01); H01L 23/538 (2013.01); H01L 24/19 (2013.01); H01L 24/94 (2013.01); H01L 24/96 (2013.01); H01L 25/0655 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/18 (2013.01); H01L 2924/18162 (2013.01); H01L 2924/3511 (2013.01);
Abstract

A packaging structure and a method for fabricating the packaging structure are provided. The method includes providing a wafer. The wafer has a first surface and a second surface opposing to the first surface, and the wafer includes a plurality of first chip regions and a spacing region between adjacent first chip regions. The method also includes forming a first adhesive layer adhered to the second surface of the wafer, and forming an opening penetrating through the spacing region of the wafer and a plurality of first chips in the first chip regions on sides of the opening. Further, the method includes forming a molding layer in the opening. The molding layer covers a sidewall of the first chip and exposes a top surface of the first chip.


Find Patent Forward Citations

Lu, Jian. (2020). Packaging structure and fabrication method thereof (U.S. Patent No. 10672662). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10672662

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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