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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10664641 B1

PDFFull Text
Date of Patent:
May. 26, 2020

Filed:

Mar. 23, 2018

Integrated device and method of forming the same

Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Hiranmay Biswas, Kolkata, IN;

Kuo-Nan Yang, Hsinchu, TW;

Chung-Hsing Wang, Hsinchu County, TW;

Meng-Xiang Lee, Yunlin County, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;

Attorneys:

WPAT, P.C., Intellectual Property Attorneys

Anthony King

Primary Examiner:

Suchin Parihar

Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 30/394 (2020.01); H01L 27/02 (2006.01); H01L 27/118 (2006.01); H01L 23/528 (2006.01); G06F 111/04 (2020.01); G06F 111/20 (2020.01); G06F 119/18 (2020.01);
U.S. Cl.
CPC ...
G06F 30/394 (2020.01); H01L 23/528 (2013.01); H01L 27/0207 (2013.01); H01L 27/11807 (2013.01); G06F 2111/04 (2020.01); G06F 2111/20 (2020.01); G06F 2119/18 (2020.01); H01L 2027/11861 (2013.01); H01L 2027/11875 (2013.01); H01L 2027/11877 (2013.01);
Abstract

A method for forming an integrated device includes following operations. A first circuit is provided. The first circuit has a first connecting path, a plurality of second connecting paths, and a third connecting path. The plurality of second connecting paths are electrically connected to a first connecting portion of the first connecting path. The third connecting path is electrically coupled to a second connecting portion of the first connecting path. An electromigration (EM) data of the first connecting path is analyzed to determine if a third connecting portion between the first connecting portion and the second connecting portion induces EM phenomenon. The first circuit is modified for generating a second circuit when the third connecting portion induces EM phenomenon. The integrated device according to the second circuit is generated.

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