The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Dec. 27, 2017
Applicant:

Spin Memory, Inc., Fremont, CA (US);

Inventors:

Neal Berger, Cupertino, CA (US);

Benjamin Louie, Fremont, CA (US);

Mourad El-Baraji, Fremont, CA (US);

Lester Crudele, Tomball, TX (US);

Assignee:

SPIN MEMORY, INC., Fremont, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/10 (2006.01); G11C 29/52 (2006.01); G11C 29/42 (2006.01); G11C 11/16 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1068 (2013.01); G06F 11/1048 (2013.01); G11C 29/42 (2013.01); G11C 29/52 (2013.01); G11C 11/1653 (2013.01); G11C 11/1673 (2013.01); G11C 11/1675 (2013.01); G11C 2029/0411 (2013.01);
Abstract

A method for correcting bit defects in an STT-MRAM memory is disclosed. The method includes reading a codeword in the STT-MRAM memory, wherein the STT-MRAM memory includes a plurality of codewords, wherein each codeword includes a plurality of redundant bits. Further, the method includes mapping defective bits in the codeword to redundant bits of the plurality of redundant bits based on a mapping scheme, wherein the mapping scheme is operable to determine a manner in which the defective bits in the codeword are to be mapped to the redundant bits. Finally, the method includes replacing the defective bits in the codeword with corresponding mapped redundant bits.


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