The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 12, 2020

Filed:

Dec. 18, 2015
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Klaus Reingruber, Langquaid, DE;

Christian Geissler, Teugn, DE;

Georg Seidemann, Landshut, DE;

Sonja Koller, Regensburg, DE;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/13 (2006.01); H01L 23/12 (2006.01); H01L 23/498 (2006.01); H05K 3/40 (2006.01); H05K 1/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/13 (2013.01); H01L 23/12 (2013.01); H01L 23/49816 (2013.01); H01L 23/49827 (2013.01); H01L 23/49805 (2013.01); H01L 23/49838 (2013.01); H05K 1/183 (2013.01); H05K 3/403 (2013.01); H05K 2201/10378 (2013.01);
Abstract

An electronic assembly that includes an electronic component; and an interposer that includes a body having upper and lower surfaces and side walls extending between the upper and lower surfaces, the interposer further including conductive routings that are exposed on at least one of the side walls, wherein the electronic component is connected directly to the interposer. The conductive routings are exposed on each side wall and on the upper and lower surfaces. The electronic assembly may further includes a substrate having a cavity such that the interposer is within the cavity, wherein the cavity includes sidewalls and substrate includes conductive traces that are exposed from the sidewalls of the cavity, wherein the conductive traces that are exposed from the sidewalls of the cavity are electrically connected directly to the conductive routings that are exposed on at least one of the side walls of the interposer.


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