The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

May. 31, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Dinesh P. R. Thanu, Chandler, AZ (US);

Hemanth K. Dhavaleswarapu, Chandler, AZ (US);

John J. Beatty, Chandler, AZ (US);

Sachin Deshmukh, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/367 (2006.01); H01L 23/373 (2006.01); H01L 23/42 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 23/3675 (2013.01); H01L 23/367 (2013.01); H01L 23/3736 (2013.01); H01L 23/42 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/16152 (2013.01);
Abstract

A microelectronic package may be fabricated to include a microelectronic substrate, a plurality of microelectronic devices attached to the microelectronic substrate, a heat dissipation device in thermal contact with at least one of the plurality of microelectronic devices and attached to the microelectronic substrate, and at least one offset spacer attached between the microelectronic substrate and the heat dissipation device to control the bondline thickness between the heat dissipation device and at least one of the plurality of microelectronic devices.


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