The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 24, 2020
Filed:
Nov. 10, 2017
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventors:
Yongxi Zhang, Plano, TX (US);
Sameer P. Pendharkar, Allen, TX (US);
Philip L. Hower, Concord, MA (US);
Salvatore Giombanco, Cassaro, IT;
Filippo Marino, Tremestieri Etneo, IT;
Seetharaman Sridhar, Richardson, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
H03K 17/687 (2006.01); H01L 29/06 (2006.01); H03K 19/0185 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H03K 17/12 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H03K 19/018521 (2013.01); H01L 27/092 (2013.01); H01L 29/0634 (2013.01); H01L 29/0696 (2013.01); H01L 29/1033 (2013.01); H01L 29/7831 (2013.01); H01L 29/7835 (2013.01); H03K 17/122 (2013.01); H01L 21/823807 (2013.01); H01L 21/823814 (2013.01);
Abstract
An integrated circuit chip includes a bimodal power N-P-Laterally Diffused Metal Oxide Semiconductor (LDMOS) device having an N-gate coupled to receive an input signal and a level shifter coupled to receive the input signal and to provide a control signal to a P-gate driver of the N-P-LDMOS device. A method of operating an N-P-LDMOS power device is also disclosed.