The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 17, 2020

Filed:

Mar. 19, 2018
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Lorenzo Fratin, Buccinasco, IT;

Fabio Pellizzer, Boise, ID (US);

Agostino Pirovano, Milan, IT;

Russell L. Meyer, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0007 (2013.01); G11C 13/0026 (2013.01); H01L 23/528 (2013.01); G11C 2213/71 (2013.01);
Abstract

Methods, systems, and devices for self-selecting memory with horizontal access lines are described. A memory array may include first and second access lines extending in different directions. For example, a first access line may extend in a first direction, and a second access line may extend in a second direction. At each intersection, a plurality of memory cells may exist, and each plurality of memory cells may be in contact with a self-selecting material (SSM). Further, a dielectric material may be positioned between a first plurality of memory cells and a second plurality of memory cells in at least one direction. each cell group (e.g., a first and second plurality of memory cells) may be in contact with one of the first access lines and second access lines, respectively.


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