The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Mar. 05, 2018
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Kuo-Hsing Lee, Hsinchu County, TW;

Yi-Chung Sheng, Tainan, TW;

Sheng-Yuan Hsueh, Tainan, TW;

Chih-Kai Kang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/092 (2006.01); H01L 21/8238 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6681 (2013.01); H01L 21/823431 (2013.01); H01L 21/823821 (2013.01); H01L 27/0886 (2013.01); H01L 27/0924 (2013.01); H01L 29/7851 (2013.01); H01L 21/845 (2013.01); H01L 27/1211 (2013.01);
Abstract

A method of forming a fin forced stack inverter includes the following steps. A substrate including a first fin, a second fin and a third fin across a first active area along a first direction is provided, wherein the first fin, the second fin and the third fin are arranged side by side. A fin remove inside active process is performed to remove at least a part of the second fin in the first active area. A first gate is formed across the first fin and the third fin in the first active area along a second direction. The present invention also provides a 1-1 fin forced fin stack inverter formed by said method.


Find Patent Forward Citations

Loading…