The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2020

Filed:

Feb. 27, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tsung-Han Ko, New Taipei, TW;

Joy Cheng, Taoyuan, TW;

Ching-Yu Chang, Yilang County, TW;

Chin-Hsiang Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/027 (2006.01); H01L 21/308 (2006.01); G03F 7/20 (2006.01); H01L 21/033 (2006.01); H01L 21/266 (2006.01); G03F 7/038 (2006.01); G03F 7/40 (2006.01); G03F 7/09 (2006.01); G03F 7/039 (2006.01); G03F 7/38 (2006.01); G03F 7/26 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0274 (2013.01); G03F 7/038 (2013.01); G03F 7/039 (2013.01); G03F 7/0392 (2013.01); G03F 7/094 (2013.01); G03F 7/20 (2013.01); G03F 7/26 (2013.01); G03F 7/38 (2013.01); G03F 7/40 (2013.01); G03F 7/405 (2013.01); H01L 21/0271 (2013.01); H01L 21/0273 (2013.01); H01L 21/0337 (2013.01); H01L 21/266 (2013.01); H01L 21/3086 (2013.01);
Abstract

A method for performing a photolithography process is provided. The method includes forming a resist layer over a substrate and exposing a portion of the resist layer to form an exposed region and an unexposed region by performing an exposure process. The method includes performing a baking process on the resist layer, so that voids are formed in the exposed region of the resist layer. The method also includes removing the unexposed region of the resist layer to form a recess in the resist layer and filling a post treatment coating material in the recess and the void. The method further includes removing a portion of the post treatment coating material by performing a second develop process, and another portion of the post treatment coating material is left on surfaces of the exposed region of the resist layer to form a patterned resist layer.


Find Patent Forward Citations

Loading…