The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 14, 2020
Filed:
Jan. 31, 2017
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Hung-Hao Chen, Hsin-Chu, TW;
Che-Cheng Chang, New Taipei, TW;
Horng-Huei Tseng, Hsin-Chu, TW;
Wen-Tung Chen, Taipei, TW;
Yu-Cheng Liu, Zhubei, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8234 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 21/027 (2006.01); H01L 21/3105 (2006.01); H01L 21/8238 (2006.01); H01L 23/00 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823431 (2013.01); H01L 21/0217 (2013.01); H01L 21/02063 (2013.01); H01L 21/0273 (2013.01); H01L 21/02129 (2013.01); H01L 21/02164 (2013.01); H01L 21/31058 (2013.01); H01L 21/31116 (2013.01); H01L 21/31138 (2013.01); H01L 21/31144 (2013.01); H01L 21/76802 (2013.01); H01L 21/76814 (2013.01); H01L 21/823475 (2013.01); H01L 21/02271 (2013.01); H01L 21/823481 (2013.01); H01L 21/823821 (2013.01); H01L 23/525 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/03452 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05186 (2013.01); H01L 2224/05567 (2013.01); H01L 2224/05624 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13147 (2013.01);
Abstract
A semiconductor device and method of manufacture are provided in which a passivation layer is patterned. In embodiments, by-products from the patterning process are removed using the same etching chamber and at the same time as the removal of a photoresist utilized in the patterning process. Such processes may be used during the manufacturing of FinFET devices.