The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Dec. 29, 2017
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

James Cooper Wainerdi, Plano, TX (US);

Luu Nguyen, San Jose, CA (US);

Alexander Harvey Scheuermann, Dallas, TX (US);

Matthew David Romig, Wylie, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03H 9/10 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01); B81B 7/00 (2006.01); H01L 23/18 (2006.01); B33Y 80/00 (2015.01); H01L 21/02 (2006.01); H01L 41/053 (2006.01); H01L 41/23 (2013.01); B29C 64/00 (2017.01);
U.S. Cl.
CPC ...
H03H 9/1042 (2013.01); B29C 64/00 (2017.08); B33Y 80/00 (2014.12); B81B 7/0058 (2013.01); H01L 21/02288 (2013.01); H01L 23/18 (2013.01); H01L 23/315 (2013.01); H01L 23/4952 (2013.01); H01L 23/49513 (2013.01); H01L 23/49531 (2013.01); H01L 23/49568 (2013.01); B81B 2203/0315 (2013.01); H01L 41/0533 (2013.01); H01L 41/23 (2013.01);
Abstract

In one aspect of the disclosure, a semiconductor package is disclosed. The semiconductor package includes a lead frame. A semiconductor die is attached to a first side of the lead frame. A protective shell covers at least a first portion of the first surface of the semiconductor die. The protective shell comprises of ink residue. A layer of molding compound covers an outer surface of the protective shell and exposed portion of the first surface of the semiconductor die. A cavity space is within an inner space of the protective shell and the first portion of the top surface of the semiconductor die.


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