The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Aug. 27, 2018
Applicant:

Taiwan Semiconductor Manufacturing Company Limited, Hsinchu, TW;

Inventors:

Yi-Tang Lin, Hsinchu, TW;

Chun Hsiung Tsai, Hsinchu County, TW;

Clement Hsingjen Wann, New York, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/00 (2006.01); H01L 21/762 (2006.01); H01L 27/12 (2006.01); H01L 27/06 (2006.01); H01L 21/761 (2006.01); H01L 27/088 (2006.01); H01L 27/092 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76251 (2013.01); H01L 21/761 (2013.01); H01L 27/0629 (2013.01); H01L 27/0688 (2013.01); H01L 27/1207 (2013.01); H01L 27/0251 (2013.01); H01L 27/0886 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01);
Abstract

A multilayer semiconductor device structure having different circuit functions on different semiconductor device layers is provided. The semiconductor structure comprises a first semiconductor device layer fabricated on a bulk substrate. The first semiconductor device layer comprises a first semiconductor device for performing a first circuit function. The first semiconductor device layer includes a patterned top surface of different materials. The semiconductor structure further comprises a second semiconductor device layer fabricated on a semiconductor-on-insulator ('SOI') substrate. The second semiconductor device layer comprises a second semiconductor device for performing a second circuit function. The second circuit function is different from the first circuit function. A bonding surface coupled between the patterned top surface of the first semiconductor device layer and a bottom surface of the SOI substrate is included. The bottom surface of the SOI substrate is bonded to the patterned top surface of the first semiconductor device layer via the bonding surface.


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