The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Jun. 14, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Jui-Fen Chien, Taichung, TW;

Chih-Hsiang Fan, Hsinchu, TW;

Hsiao-Kuan Wei, Longtan Township, Taoyuan County, TW;

Pohan Kung, Tainan, TW;

Hsien-Ming Lee, Changhua, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 21/321 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28088 (2013.01); H01L 21/3212 (2013.01); H01L 29/4966 (2013.01); H01L 29/6681 (2013.01); H01L 29/66545 (2013.01); H01L 29/0649 (2013.01);
Abstract

Methods of fabricating semiconductor devices are provided. The method includes forming a gate dielectric layer over a substrate. The method also includes depositing a first p-type work function tuning layer over the gate dielectric layer using a first atomic layer deposition (ALD) process with an inorganic precursor. The method further includes forming a second p-type work function tuning layer on the first p-type work function tuning layer using a second atomic layer deposition (ALD) process with an organic precursor. In addition, the method includes forming an n-type work function metal layer over the second p-type work function tuning layer.


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