The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2019

Filed:

Oct. 02, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Ming Lai, Hsinchu, TW;

Shih-Ming Chang, Zhubei, TW;

Wei-Liang Lin, Hsinchu, TW;

Chin-Yuan Tseng, Taipei, TW;

Ru-Gun Liu, Zhubei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/033 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); H01L 21/0332 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01);
Abstract

A method for forming a semiconductor device structure is provided. The method includes forming a first layer over a substrate. The first layer has a trench. The method includes forming first spacers over inner walls of the trench. The method includes removing a portion of the first spacers. The method includes forming a filling layer into the trench to cover the first spacers. The filling layer and the first spacers together form a strip structure. The method includes removing the first layer. The method includes forming second spacers over two opposite first sidewalls of the strip structure. The method includes forming third spacers over second sidewalls of the second spacers. The method includes removing the filling layer and the second spacers.


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