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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10438996 B1

PDFFull Text
Date of Patent:
Oct. 08, 2019

Filed:

Jan. 08, 2018

Methods of fabricating magnetic tunnel junctions integrated with selectors

Applicant:

Spin Transfer Technologies, Inc., Fremont, CA (US);

Inventors:

Kuk-Hwan Kim, Fremont, CA (US);

Dafna Beery, Fremont, CA (US);

Andy Walker, Fremont, CA (US);

Amitay Levi, Fremont, CA (US);

Assignee:

Spin Memory, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:

Bac H Au

Int. Cl.
CPC ...
H01L 27/22 (2006.01); H01L 21/768 (2006.01); H01L 43/02 (2006.01); G11C 11/16 (2006.01); H01F 10/32 (2006.01); H01F 41/32 (2006.01); H01L 45/00 (2006.01); H01L 43/12 (2006.01); H01L 43/10 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 27/224 (2013.01); G11C 11/161 (2013.01); H01F 10/3254 (2013.01); H01F 10/3272 (2013.01); H01F 10/3286 (2013.01); H01F 41/32 (2013.01); H01L 21/7684 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 43/02 (2013.01); H01L 43/12 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); H01L 45/1608 (2013.01); G11C 2211/5615 (2013.01); H01F 10/329 (2013.01); H01L 21/3212 (2013.01); H01L 43/10 (2013.01);
Abstract

Methods of fabricating devices including arrays of integrated Magnetic Tunnel Junctions (MTJs) and corresponding selectors in an array of cells. The array of cells can include a plurality of source lines disposed in columns, set of selectors coupled to respective source lines, MJT structures coupled to respective selectors and a plurality of bit lines disposed in rows and coupled to respective sets of MTJ structures. The array of cells can also include buffers coupled between respective selectors and respective MTJ structures. In addition, multiple arrays can be fabricated on top of each other to implement vertical three-dimensional (3D) MTJ devices.

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