The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 01, 2019
Filed:
Jan. 02, 2018
Applicants:
United Microelectronics Corp., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Inventors:
Assignees:
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 29/08 (2006.01); H01L 23/528 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10808 (2013.01); H01L 21/31111 (2013.01); H01L 21/31144 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 27/10855 (2013.01); H01L 29/0847 (2013.01); H01L 27/10814 (2013.01); H01L 27/10823 (2013.01);
Abstract
A semiconductor device and a manufacturing method thereof are provided. The method includes providing a substrate, a plurality of word lines and a plurality of bit lines, and then forming a storage node contact on each source/drain region, so that a width of a top surface of each storage node contact in a direction is less than a width of a bottom surface of each storage node contact.