The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2019

Filed:

Jun. 29, 2017
Applicant:

Intel Ip Corporation, Santa Clara, CA (US);

Inventors:

Georg Seidemann, Landshut, DE;

Bernd Waidhas, Pettendorf, DE;

Thomas Wagner, Regelsbach, DE;

Andreas Wolter, Regensburg, DE;

Laurent Millou, Munich, DE;

Assignee:

Intel IP Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 23/498 (2006.01); H01L 25/065 (2006.01); G11C 16/18 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5382 (2013.01); G11C 16/18 (2013.01); H01L 23/49861 (2013.01); H01L 25/0657 (2013.01); H01L 2224/4826 (2013.01);
Abstract

A multi-chip module includes two silicon bridge interconnects and three components that are tied together by the bridges with one of the components in the center. At least one of the silicon bridge interconnects is bent to create a non-planar chip-module form factor. Cross-connected multi-chip silicon bent-bridge interconnect modules include the two silicon bridges contacting the center component at right angles to each other, plus a fourth component and a third silicon bridge interconnect contacting the fourth component and any one of the original three components.


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