The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2019

Filed:

Aug. 09, 2017
Applicant:

Asm Ip Holding B.v., Almere, NL;

Inventors:

Xiaoqiang Jiang, Tempe, AZ (US);

Fu Tang, Gilbert, AZ (US);

Qi Xie, Leuven, BE;

Pauline Calka, Leuven, BE;

Sung-Hoon Jung, Chandler, AZ (US);

Michael Eugene Givens, Helsinki, FI;

Assignee:

ASM IP Holding B.V., Almere, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 23/31 (2006.01); H01L 23/29 (2006.01); C23C 16/455 (2006.01); H01L 21/67 (2006.01); C23C 16/30 (2006.01); H01L 21/306 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3171 (2013.01); C23C 16/305 (2013.01); C23C 16/45544 (2013.01); C23C 16/45553 (2013.01); H01L 21/02178 (2013.01); H01L 21/02205 (2013.01); H01L 21/02271 (2013.01); H01L 21/02312 (2013.01); H01L 21/306 (2013.01); H01L 21/67017 (2013.01); H01L 21/6719 (2013.01); H01L 23/291 (2013.01); H01L 21/67155 (2013.01); H01L 29/66477 (2013.01);
Abstract

A system and a method for passivating a surface of a semiconductor. The method includes providing the surface of the semiconductor to a reaction chamber of a reactor, exposing the surface of the semiconductor to a gas-phase metal containing precursor in the reaction chamber and exposing the surface of the semiconductor to a gas-phase chalcogenide containing precursor. The methods also include passivating the surface of the semiconductor using the gas-phase metal containing precursor and the gas-phase chalcogenide containing precursor to form a passivated surface. The system for passivating a surface of a semiconductor may include a reactor, a metal containing precursor source fluidly coupled to the reactor, and a chalcogenide containing precursor source fluidly couple to the reactor, wherein the metal containing precursor source provides a gas-phase metal containing precursor to a reaction chamber of the reactor, and wherein the chalcogenide containing precursor source provides a gas-phase chalcogenide containing precursor to a reaction chamber of the reactor.

Published as:
US2018108587A1; KR20180041083A; TW201833374A; US10410943B2; TWI757322B; KR102533116B1;

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