logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10410874 B1

PDFFull Text
Date of Patent:
Sep. 10, 2019

Filed:

Jan. 10, 2018

Plasma processing apparatus and method, and method of manufacturing semiconductor device using the same

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Beom Jin Yoo, Hwaseong-si, KR;

Sang Ki Nam, Seongnam-si, KR;

Kwang-Youb Heo, Yongin-si, KR;

Jehun Woo, Suwon-si, KR;

Sang-Heon Lee, Seongnam-si, KR;

Masahiko Tomita, Seongnam-si, KR;

Vasily Pashkovskiy, Gyeonggi-do, KR;

Assignee:

SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;

Attorney:

Sughrue Mion, PLLC

Primary Examiner:

Jiong-Ping Lu

Int. Cl.
CPC ...
H01L 21/3065 (2006.01); H01J 37/32 (2006.01); H01L 21/027 (2006.01); H01L 21/67 (2006.01); H01L 21/683 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3065 (2013.01); H01J 37/32128 (2013.01); H01J 37/32146 (2013.01); H01J 37/32165 (2013.01); H01J 37/32174 (2013.01); H01J 37/32724 (2013.01); H01L 21/0273 (2013.01); H01L 21/31116 (2013.01); H01L 21/31138 (2013.01); H01L 21/31144 (2013.01); H01L 21/67069 (2013.01); H01L 21/67248 (2013.01); H01L 21/6831 (2013.01); H01L 21/6833 (2013.01); H01J 2237/334 (2013.01); H01L 21/67103 (2013.01); H01L 21/67109 (2013.01);
Abstract

In a plasma processing method, a substrate is loaded onto a substrate electrode within a chamber, the substrate having an object layer to be etched thereon. A plasma generating power output is applied to form plasma within the chamber. A first bias power output is applied to the substrate electrode to perform a first etch stage on the object layer. A second bias power output having a nonsinusoidal voltage waveform is applied to the substrate electrode to perform a second etch stage on the object layer.

Find Patent Forward Citations

Loading…