The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 20, 2019
Filed:
Nov. 03, 2017
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Inventors:
Chih-Horng Chang, Taipei, TW;
Tin-Hao Kuo, Hsinchu, TW;
Chen-Shien Chen, Zhubei, TW;
Yen-Liang Lin, Taichung, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/13 (2013.01); H01L 24/11 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 24/81 (2013.01); H01L 25/50 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05552 (2013.01); H01L 2224/05572 (2013.01); H01L 2224/05599 (2013.01); H01L 2224/10145 (2013.01); H01L 2224/11849 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13011 (2013.01); H01L 2224/13012 (2013.01); H01L 2224/13015 (2013.01); H01L 2224/13018 (2013.01); H01L 2224/13082 (2013.01); H01L 2224/13083 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/1412 (2013.01); H01L 2224/14051 (2013.01); H01L 2224/14152 (2013.01); H01L 2224/14153 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81345 (2013.01); H01L 2224/81815 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/2064 (2013.01); H01L 2924/384 (2013.01); Y10T 428/12493 (2015.01); Y10T 428/24479 (2015.01);
Abstract
In some embodiments, the present disclosure relates to a method of integrated chip bonding. The method is performed by forming a metal layer on a substrate, and forming a solder layer on the metal layer. The solder layer is reflowed. The metal layer and the solder layer have sidewalls defining a recess that is at least partially filled by the solder layer during reflowing of the solder layer.