The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 06, 2019

Filed:

Nov. 20, 2018
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

Pei-Haw Tsao, Taichung, TW;

Tsung-Hsing Lu, Hsinchu County, TW;

Li-Huan Chu, Hsinchu, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/48 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 23/49894 (2013.01); H05K 1/0222 (2013.01);
Abstract

A semiconductor structure includes a first substrate including a first surface and a second surface opposite to the first surface; a second substrate including a third surface and a fourth surface opposite to the third surface; a polymeric layer disposed between the second surface of the first substrate and the third surface of the second substrate; a first conductive via extended through the first substrate, the second substrate and the polymeric layer; a second conductive via extended through the first substrate, the second substrate and the polymeric layer; and a third conductive via extended through the first substrate, the second substrate and the polymeric layer, wherein the second conductive via is disposed between the first conductive via and the third conductive via, the second conductive via is configured to connect to a signal source, the first conductive via and the third conductive via are configured to connect to electrical ground.


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