The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 06, 2019
Filed:
May. 22, 2017
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 27/11 (2006.01); H01L 21/8234 (2006.01); H01L 29/423 (2006.01); H01L 21/3105 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/06 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823821 (2013.01); H01L 21/28114 (2013.01); H01L 21/3105 (2013.01); H01L 21/823481 (2013.01); H01L 27/0924 (2013.01); H01L 27/1104 (2013.01); H01L 29/42376 (2013.01); H01L 29/66545 (2013.01); H01L 29/7843 (2013.01); H01L 21/823437 (2013.01); H01L 21/823814 (2013.01); H01L 21/823828 (2013.01); H01L 21/823878 (2013.01); H01L 27/0207 (2013.01); H01L 29/7848 (2013.01);
Abstract
A method of forming a semiconductor device includes forming a first dummy gate structure over a substrate, forming gate spacers over the substrate, cutting the first dummy gate structure to form separated dummy gate portions, forming a dielectric feature between the dummy gate portions, and performing a thermal process to the dielectric feature to contract the dielectric feature, wherein the contraction of the dielectric feature deforms at least one of the gate spacers such that a distance between the gate spacers is increased.