The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2019
Filed:
Nov. 25, 2014
Applicant:
Pac Tech—packaging Technologies Gmbh, Nauen, DE;
Inventors:
Assignee:
PAC TECH—PACKAGING TECHNOLOGIES GMBH, Nauen, DE;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/538 (2006.01); H01L 23/495 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H01L 24/27 (2013.01); H01L 21/4832 (2013.01); H01L 23/49562 (2013.01); H01L 23/49816 (2013.01); H01L 23/5384 (2013.01); H01L 23/5389 (2013.01); H01L 24/11 (2013.01); H01L 24/24 (2013.01); H01L 24/25 (2013.01); H01L 24/29 (2013.01); H01L 24/32 (2013.01); H01L 24/82 (2013.01); H01L 24/96 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/16245 (2013.01); H01L 2224/24137 (2013.01); H01L 2224/2518 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73259 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/81224 (2013.01); H01L 2224/81903 (2013.01); H01L 2224/82005 (2013.01); H01L 2224/82039 (2013.01); H01L 2224/83192 (2013.01); H01L 2224/92144 (2013.01); H01L 2224/92224 (2013.01);
Abstract
The invention concerns a method for producing a chip module having a carrier substrate and at least one chip arranged on the carrier substrate, as well as a contact conductor arrangement for connecting chip pads to contacts arranged on a contact face of the chip module, in which method the front face of the chip which is provided with the chip pads is secured to the carrier substrate and then the contact conductor arrangement is formed by structuring of a contact material layer of the carrier substrate.