The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 02, 2019

Filed:

Apr. 13, 2017
Applicant:

United Microelectronics Corp., Hsinchu, TW;

Inventors:

Chun-Hung Chen, Tainan, TW;

Chu-Fu Lin, Kaohsiung, TW;

Ming-Tse Lin, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/64 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/645 (2013.01); H01L 23/3185 (2013.01); H01L 21/568 (2013.01); H01L 24/19 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/96 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/19042 (2013.01); H01L 2924/19105 (2013.01); H01L 2924/30107 (2013.01);
Abstract

A semiconductor package structure and a method for forming the same are disclosed. The semiconductor package structure includes a semiconductor die, a molding layer and an inductor. The semiconductor die includes an active surface, a back surface and a sidewall surface between the active surface and the back surface. The molding layer covers the back surface and the sidewall surface of the semiconductor die. The inductor is in the molding layer. The sidewall surface of the semiconductor die faces toward the inductor.


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