The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Sep. 08, 2017
Applicant:

Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;

Inventors:

Chih-Cheng Lee, Kaohsiung, TW;

Yuan-Chang Su, Kaohsiung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/02 (2006.01); H01L 23/498 (2006.01); H01L 21/48 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 21/6835 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01);
Abstract

A substrate for packaging a semiconductor device includes a first dielectric layer having a first surface and a second surface opposite to the first surface, a first patterned conductive layer adjacent to the first surface of the first dielectric layer, and a second patterned conductive layer adjacent to the second surface of the first dielectric layer and electrically connected to the first patterned conductive layer. The first patterned conductive layer includes a first portion and a second portion. Each of the first portion and the second portion is embedded in the first dielectric layer and protrudes relative to the first surface of the first dielectric layer toward a direction away from the second surface of the first dielectric layer. A thickness of the first portion of the first patterned conductive layer is greater than a thickness of the second portion of the first patterned conductive layer.


Find Patent Forward Citations

Lee, Chih-Cheng. (2019). Substrate for packaging a semiconductor device package and a method of manufacturing the same (U.S. Patent No. 10325842). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10325842

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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