The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 18, 2019

Filed:

Apr. 25, 2018
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Luca Gaetano Amaru, Santa Clara, CA (US);

Patrick Vuillod, St. Bernard du Touvet, FR;

Jiong Luo, Fremont, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/505 (2013.01); G06F 17/509 (2013.01); G06F 17/5031 (2013.01); G06F 17/5081 (2013.01); G06F 2217/84 (2013.01);
Abstract

Systems and techniques for optimizing an integrated circuit (IC) design are described. A logic-function identifier can be determined based on a fan-in combinational-logic-cone, wherein the logic-function identifier corresponds to a logic function that is implemented by the fan-in combinational-logic-cone. An arrival-time-pattern identifier can be determined based on a set of arrival times at inputs of the fan-in combinational-logic-cone. An optimized combinational-logic-cone can be obtained by performing, in addition to optionally other operations, a database lookup by using the logic-function identifier and the arrival-time-pattern identifier. Next, the fan-in combinational-logic-cone can be replaced with the optimized combinational-logic-cone in the IC design.


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