The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 04, 2019

Filed:

Nov. 04, 2016
Applicant:

The Regents of the University of California, Oakland, CA (US);

Inventors:

Srabanti Chowdhury, San Ramon, CA (US);

Jeonghee Kim, Mohegan Lake, NY (US);

Chirag Gupta, Santa Barbara, CA (US);

Stacia Keller, Santa Barbara, CA (US);

Silvia H. Chan, Santa Barbara, CA (US);

Umesh K. Mishra, Santa Barbara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 29/205 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H01L 29/40 (2006.01); H01L 29/417 (2006.01); H01L 29/06 (2006.01); H01L 29/51 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 29/0646 (2013.01); H01L 29/0649 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/407 (2013.01); H01L 29/41766 (2013.01); H01L 29/4236 (2013.01); H01L 29/66462 (2013.01); H01L 29/7788 (2013.01); H01L 29/7789 (2013.01); H01L 29/0623 (2013.01); H01L 29/517 (2013.01); H01L 29/861 (2013.01);
Abstract

Trenched vertical power field-effect transistors with improved on-resistance and/or breakdown voltage are fabricated. In one or more embodiments, the modulation of the current flow of the transistor occurs in the lateral channel, whereas the voltage is predominantly held in the vertical direction in the off-state. When the device is in the on-state, the current is channeled through an aperture in a current-blocking region after it flows under a gate region into the drift region. In another embodiment, a novel vertical power low-loss semiconductor multi-junction device in III-nitride and non-III-nitride material system is provided. One or more multi-junction device embodiments aim at providing enhancement mode (normally-off) operation alongside ultra-low on resistance and high breakdown voltage.


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