The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 28, 2019

Filed:

Mar. 31, 2017
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sasha N. Oster, Chandler, AZ (US);

Fay Hua, Fremont, CA (US);

Telesphor Kamgaing, Chandler, AZ (US);

Adel A. Elsherbini, Chandler, AZ (US);

Henning Braunisch, Phoenix, AZ (US);

Johanna M. Swan, Scottsdale, AZ (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/285 (2006.01); H01L 21/768 (2006.01); H01L 21/033 (2006.01); B82Y 40/00 (2011.01);
U.S. Cl.
CPC ...
H01L 21/28562 (2013.01); B82Y 40/00 (2013.01); H01L 21/033 (2013.01); H01L 21/4763 (2013.01); H01L 21/76822 (2013.01); H01L 21/76834 (2013.01);
Abstract

Embodiments include devices and methods, including a method for processing a substrate. The method includes providing a substrate including a first portion and a second portion, the first portion including a feature, the feature including an electrically conductive region, the second portion including a dielectric surface region. The method also includes performing self-assembled monolayer (SAM) assisted structuring plating to form a structure comprising a metal on the dielectric surface region, the feature being formed using a process other than the SAM assisted structuring plating used to form the structure, and the structure being formed after the feature. Other embodiments are described and claimed.


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