The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 21, 2019

Filed:

Nov. 29, 2016
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Hongning Yang, Chandler, AZ (US);

Xin Lin, Phoenix, AZ (US);

Ronghua Zhu, Chandler, AZ (US);

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/105 (2006.01); H01L 21/76 (2006.01); H01L 21/761 (2006.01); H01L 21/762 (2006.01); H01L 29/40 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66659 (2013.01); H01L 21/76 (2013.01); H01L 21/761 (2013.01); H01L 21/76224 (2013.01); H01L 29/063 (2013.01); H01L 29/0653 (2013.01); H01L 29/1087 (2013.01); H01L 29/7835 (2013.01); H01L 29/1045 (2013.01); H01L 29/1083 (2013.01); H01L 29/402 (2013.01);
Abstract

Embodiments of a device are provided, including a semiconductor substrate including an active device area; a body region disposed in the semiconductor substrate within the active device area, wherein a channel is formed within the body region during operation; a doped isolation layer disposed in the semiconductor substrate underneath the active device area, the doped isolation layer including an opening positioned under the active device area; and a lightly-doped isolation layer disposed in the semiconductor substrate underneath the active device area, the lightly-doped isolation layer positioned at least within the opening and in electrical contact with the doped isolation layer, wherein the doped isolation layer and the lightly-doped isolation layer form a doped isolation barrier that extends across an entire lateral extent of the active device area.


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