The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 14, 2019

Filed:

Feb. 04, 2015
Applicant:

Crossbar, Inc., Santa Clara, CA (US);

Inventors:

Sundar Narayanan, Cupertino, CA (US);

Steve Maxwell, Sunnyvale, CA (US);

Natividad Vasquez, Jr., San Francisco, CA (US);

Harry Yue Gee, Santa Clara, CA (US);

Assignee:

CROSSBAR, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1233 (2013.01); H01L 27/249 (2013.01); H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 45/085 (2013.01); H01L 45/124 (2013.01); H01L 45/1226 (2013.01); H01L 45/1266 (2013.01); H01L 45/145 (2013.01); H01L 45/146 (2013.01); H01L 45/16 (2013.01);
Abstract

A memory cell that includes a first metal layer formed over a substrate is provided. The substrate includes one or more complementary metal-oxide semiconductor devices. The memory cell also includes a via device that connects at least a portion of the first metal layer and at least another portion of a second metal layer. The first metal layer has a first thickness having an edge thereof that serves as an electrode for a memory cell formed by the via device. The memory cell scales as a function of the first thickness and at least in part independent of a minimum feature size of the memory device.


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