The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 07, 2019
Filed:
Jun. 15, 2015
Applicant:
Kilopass Technology, Inc., San Jose, CA (US);
Inventors:
Harry Luan, Saratoga, CA (US);
Bruce L. Bateman, Fremont, CA (US);
Valery Axelrad, Woodside, CA (US);
Charlie Cheng, Los Altos, CA (US);
Christophe J. Chevallier, Palo Alto, CA (US);
Assignee:
TC Lab, Inc., Gilroy, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/39 (2006.01); G11C 11/34 (2006.01); G11C 11/418 (2006.01); G11C 11/419 (2006.01); G11C 11/411 (2006.01); G11C 11/416 (2006.01); H01L 27/11 (2006.01); H01L 21/8249 (2006.01); H01L 27/06 (2006.01); H01L 27/102 (2006.01); H01L 27/082 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G11C 11/39 (2013.01); G11C 11/34 (2013.01); G11C 11/416 (2013.01); G11C 11/418 (2013.01); G11C 11/419 (2013.01); G11C 11/4113 (2013.01); H01L 21/8249 (2013.01); H01L 27/0623 (2013.01); H01L 27/1027 (2013.01); H01L 27/11 (2013.01); H01L 27/1104 (2013.01); G11C 5/14 (2013.01); H01L 27/0821 (2013.01); H01L 27/0826 (2013.01);
Abstract
A two-transistor memory cell based upon a thyristor for an SRAM integrated circuit is described together with methods of operation. The memory cell can be implemented in different combinations of MOS and bipolar select transistors, or without select transistors, with thyristors in a semiconductor substrate with shallow trench isolation. Standard CMOS process technology can be used to manufacture the SRAM.