The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Feb. 14, 2018
Applicant:

Toshiba Memory Corporation, Minato-ku, JP;

Inventors:

Tatsufumi Hamada, Yokkaichi, JP;

Hikari Tajima, Mitaka, JP;

Takashi Izumida, Yokohama, JP;

Nobutoshi Aoki, Yokohama, JP;

Shinya Naito, Toyota, JP;

Takayuki Kakegawa, Yokkaichi, JP;

Takaya Yamanaka, Yokkaichi, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 23/528 (2006.01); H01L 27/11551 (2017.01); H01L 29/792 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 23/5283 (2013.01); H01L 27/11551 (2013.01); H01L 29/66833 (2013.01); H01L 29/792 (2013.01);
Abstract

According to one embodiment, a semiconductor device includes a substrate; a stacked body provided on the substrate, the stacked body including a plurality of electrode layers stacked with an insulator interposed; a semiconductor body provided in the stacked body; and an insulating film. The semiconductor body includes a channel portion extending in a stacking direction of the stacked body, and a lower end portion of the semiconductor body provided between the channel portion and the substrate. The insulating film includes a charge storage film provided between the stacked body and the semiconductor body. A lower end portion of the insulating film surrounds the lower end portion of the semiconductor body. An upper surface of the lower end portion of the insulating film is provided at a lower height than an upper surface of the lower end portion of the semiconductor body in the stacking direction.


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