The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 30, 2019

Filed:

Oct. 30, 2017
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Brandon P. Wirz, Boise, ID (US);

Benjamin L. McClain, Boise, ID (US);

C. Alexander Ernst, Boise, ID (US);

Jeremy E. Minnich, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/73 (2013.01); H01L 24/83 (2013.01); H01L 24/94 (2013.01); H01L 2224/10145 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13655 (2013.01); H01L 2224/16148 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81007 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/81359 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/83203 (2013.01); H01L 2924/014 (2013.01); H01L 2924/3651 (2013.01); H01L 2924/3841 (2013.01);
Abstract

A semiconductor device, semiconductor device assembly, and method of forming a semiconductor device assembly that includes a barrier on a pillar. The semiconductor device assembly includes a semiconductor device disposed over another semiconductor device. At least one pillar extends from one semiconductor device towards a pad on the other semiconductor device. The barrier on the exterior of the pillar may be a standoff to control a bond line between the semiconductor devices. The barrier may reduce solder bridging and may prevent reliability and electromigration issues that can result from the IMC formation between the solder and copper portions of a pillar. The barrier may help align the pillar with a pad when forming a semiconductor device assembly and may reduce misalignment due to lateral movement of the semiconductor devices. Windows or slots in the barrier may permit the expansion of solder in predetermined directions while preventing bridging in other directions.


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