The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 30, 2019
Filed:
May. 23, 2018
United Microelectronics Corp., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Chih-Chieh Tsai, Kaohsiung, TW;
Yi-Wei Chen, Taichung, TW;
Pin-Hong Chen, Tainan, TW;
Chih-Chien Liu, Taipei, TW;
Tzu-Chieh Chen, Pingtung County, TW;
Chun-Chieh Chiu, Keelung, TW;
Tsun-Min Cheng, Changhua County, TW;
Kai-Jiun Chang, Taoyuan, TW;
Chia-Chen Wu, Nantou County, TW;
Yi-An Huang, New Taipei, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;
Abstract
A method for fabricating semiconductor device includes the steps of: forming a silicon layer on a substrate; forming a first metal silicon nitride layer on the silicon layer; performing an oxygen treatment process to form an oxide layer on the first metal silicon nitride layer; forming a second metal silicon nitride layer on the oxide layer; forming a conductive layer on the second metal silicon nitride layer; and patterning the conductive layer, the second metal silicon nitride layer, the oxide layer, the first metal silicon nitride layer, and the silicon layer to form a gate structure.