logo

For the Inventor, By the Inventor

The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10269669 B1

PDFFull Text
Date of Patent:
Apr. 23, 2019

Filed:

Jun. 07, 2017

Semiconductor package and method of forming the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Ying-Shin Han, Hsinchu, TW;

Yen-Miao Lin, Miaoli County, TW;

Chung-Chih Chen, Hsinchu, TW;

Hsien-Liang Meng, Hsinchu, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;

Attorney:

Maschoff Brennan

Primary Examiner:

Long Pham

Int. Cl.
CPC ...
H01L 23/10 (2006.01); H01L 21/48 (2006.01); H01L 23/053 (2006.01); H01L 23/00 (2006.01); H01L 23/14 (2006.01); H01L 23/36 (2006.01); H01L 23/367 (2006.01); H01L 23/42 (2006.01);
U.S. Cl.
CPC ...
H01L 23/10 (2013.01); H01L 21/4817 (2013.01); H01L 23/053 (2013.01); H01L 23/145 (2013.01); H01L 23/36 (2013.01); H01L 23/3675 (2013.01); H01L 23/42 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/73 (2013.01); H01L 24/81 (2013.01); H01L 24/92 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/13155 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/92225 (2013.01); H01L 2924/163 (2013.01); H01L 2924/16251 (2013.01); H01L 2924/3511 (2013.01); H01L 2924/3512 (2013.01); H01L 2924/35121 (2013.01);
Abstract

A semiconductor package includes a substrate, an integrated circuit die, a lid and an adhesive. The integrated circuit die is disposed over the substrate. The lid is disposed over the substrate. The lid includes a cap portion and a foot portion extending from a bottom surface of the cap portion. The cap portion and the foot portion define a recess, and the integrated circuit die is accommodated in the recess. The adhesive includes a sidewall portion and a bottom portion. The sidewall portion contacts a sidewall of the foot portion. The bottom portion extends from the sidewall portion to between a bottom surface of the foot portion and the substrate.

Find Patent Forward Citations

Loading…