The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 09, 2019

Filed:

Nov. 14, 2016
Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Wallace P. Printz, Austin, TX (US);

Shuhei Takahashi, Koshi, JP;

Naoyuki Okamura, Kumamoto, JP;

Masami Yamashita, Koshi, JP;

Derek W. Bassett, Cedar Park, TX (US);

Antonio Luis Pacheco Rotondaro, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/306 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 21/66 (2006.01); H01L 23/00 (2006.01); C09K 13/00 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01); C09K 13/00 (2013.01); H01L 21/30604 (2013.01); H01L 21/30608 (2013.01); H01L 21/32134 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/53228 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 28/00 (2013.01); H01L 21/76898 (2013.01);
Abstract

Embodiments of the invention provide a method for treating a microelectronic substrate with dilute TMAH. In the method, a microelectronic substrate is received into a process chamber, the microelectronic substrate having a layer, feature or structure of silicon. A treatment solution is applied to the microelectronic substrate to etch the silicon, where the treatment solution includes a dilution solution and TMAH. A controlled oxygen content is provided in the treatment solution or in an environment in the process chamber to achieve a target etch selectivity of the silicon, or a target etch uniformity across the layer, feature or structure of silicon, or both by the treatment solution.


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