The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 12, 2019
Filed:
Mar. 13, 2017
Maxim Integrated Products, Inc., San Jose, CA (US);
John Xia, Fremont, CA (US);
Marco A. Zungia, Berkeley, CA (US);
Badredin Fatemizadeh, Palo Alto, CA (US);
Maxin Integrated Products, Inc., San Jose, CA (US);
Abstract
A lateral double-diffused metal-oxide-semiconductor field effect (LDMOS) transistor includes a silicon semiconductor structure including (a) a base layer, (b) a p-type reduced surface field effect (RESURF) layer disposed over the base layer in a thickness direction, (c) a p-body disposed over the p-type RESURF layer in the thickness direction, (d) a source p+ region and a source n+ region each disposed in the p-body, (e) a high-voltage n-type laterally-diffused drain (HVNLDD) disposed adjacent to the p-body in a lateral direction orthogonal to the thickness direction, the HVNLDD contacting the p-type RESURF layer, and (f) a drain n+ region disposed in the HVNLDD. The LDMOS transistor further includes (a) a first dielectric layer disposed on the silicon semiconductor structure in the thickness direction over at least part of the p-body and the HVNLDD and (b) a first gate conductor disposed on the first dielectric layer in the thickness direction.