The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 12, 2019

Filed:

Jan. 23, 2018
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Chun Chen, San Jose, CA (US);

Kuo-Tung Chang, Saratoga, CA (US);

Yoram Betser, Mazkeret Batya, IL;

Shivananda Shetty, San Jose, CA (US);

Giovanni Mazzeo, Sacramento, CA (US);

Tio Wei Neo, Fremont, CA (US);

Pawan Singh, Santa Clara, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/10 (2006.01); G11C 16/34 (2006.01); G11C 16/30 (2006.01); G11C 16/04 (2006.01); G11C 7/04 (2006.01); G11C 16/24 (2006.01); G11C 16/16 (2006.01); G11C 16/26 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3427 (2013.01); G11C 7/04 (2013.01); G11C 16/0425 (2013.01); G11C 16/0433 (2013.01); G11C 16/0466 (2013.01); G11C 16/10 (2013.01); G11C 16/16 (2013.01); G11C 16/24 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01);
Abstract

Techniques for suppression of program disturb in flash memory devices are described herein. In an example embodiment, an apparatus comprises a flash memory device coupled to a microprocessor. The flash memory device comprises rows and columns of memory cells, where the memory cells in each row are coupled to a source line and to a select-gate (SG) line, and the memory cells in each column are coupled to a respective bit line (BL). A control circuit in the flash memory device is configured to regulate both a first voltage, of a selected SG line, and a second voltage, of an unselected BL, independently of a power supply voltage of the flash memory device, and to adjust at least one of the first voltage and the second voltage based on a measure of an operating temperature of the flash memory device.


Find Patent Forward Citations

Loading…