The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 26, 2019
Filed:
Jan. 30, 2013
Applicant:
Nvidia Corporation, Santa Clara, CA (US);
Inventors:
Leilei Zhang, Sunnyvale, CA (US);
Ronilo V. Boja, Gilroy, CA (US);
Abraham Fong Yee, Cupertino, CA (US);
Zuhair Bokharey, Fremont, CA (US);
Assignee:
NVIDIA CORPORATION, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/00 (2006.01); H05K 3/42 (2006.01);
U.S. Cl.
CPC ...
H05K 3/0094 (2013.01); H05K 3/0032 (2013.01); H05K 3/0047 (2013.01); H05K 3/42 (2013.01); H05K 2201/0959 (2013.01); H05K 2201/09827 (2013.01); H05K 2201/09854 (2013.01); H05K 2203/1476 (2013.01); H05K 2203/1572 (2013.01); Y10T 29/49165 (2015.01);
Abstract
A process for manufacturing a printed circuit board having high-density microvias formed in a thick substrate is disclosed. The method includes the steps of forming one or more holes in a thick substrate using a laser drilling technique, electroplating the one or more holes with a conductive material, wherein the conductive material does not completely fill the one or more holes, and filling the one or more plated holes with a non-conductive material.