The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 25, 2018

Filed:

Dec. 07, 2016
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Hsien-Cheng Wang, Hsinchu, TW;

Ming-Chang Wen, Kaohsiung, TW;

Chun-Kuang Chen, Hsinchu, TW;

Yao-Ching Ku, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03F 7/20 (2006.01); H01L 21/66 (2006.01); H01L 29/66 (2006.01); H01L 21/265 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 22/32 (2013.01); G03F 7/70633 (2013.01); H01L 21/265 (2013.01); H01L 29/66545 (2013.01); H01L 29/517 (2013.01);
Abstract

A partially fabricated semiconductor device includes a semiconductor overlay structure. The semiconductor overlay structure includes a first gate stack structure over the semiconductor substrate, the first gate stack structure being configured as an overlay mark in an overlay region of the semiconductor substrate. The semiconductor overlay structure further includes a doped region in the semiconductor substrate surrounding the first gate stack structure. The doped region has a first dopant concentration greater than or equal to a second dopant concentration next to a second gate stack structure in a device region of the semiconductor substrate.


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