The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 25, 2018
Filed:
Mar. 16, 2015
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Jui-Long Chen, Taichung, TW;
Chien-Chih Liao, Miao-li, TW;
Chin-Hsiang Lin, Hsin-chu, TW;
Hui-yun Chao, Zhubei, TW;
Jong-I Mou, Hsinchu, TW;
Tseng Chin Lo, Hsinchu, TW;
Ta-Yung Lee, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A system and method for aligning a probe, such as a wafer-level test probe, with wafer contacts is disclosed. An exemplary method includes receiving a wafer containing a plurality of alignment contacts and a probe card containing a plurality of probe points at a wafer test system. A historical offset correction is received. Based on the historical offset correct, an orientation value for the probe card relative to the wafer is determined. The probe card is aligned to the wafer using the orientation value in an attempt to bring a first probe point into contact with a first alignment contact. The connectivity of the first probe point and the first alignment contact is evaluated. An electrical test of the wafer is performed utilizing the aligned probe card, and the historical offset correction is updated based on the orientation value.