The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 18, 2018

Filed:

Oct. 14, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Thorsten Meyer, Regensburg, DE;

Gerald Ofner, Regensburg, DE;

Teodora Ossiander, Sinzing, DE;

Frank Zudock, Regensburg, DE;

Christian Geissler, Teugn, DE;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/00 (2006.01); H01L 21/02 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 23/525 (2006.01);
U.S. Cl.
CPC ...
H01L 24/11 (2013.01); H01L 21/02282 (2013.01); H01L 21/02318 (2013.01); H01L 21/311 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/7685 (2013.01); H01L 21/76802 (2013.01); H01L 21/76834 (2013.01); H01L 21/76871 (2013.01); H01L 24/02 (2013.01); H01L 24/03 (2013.01); H01L 24/05 (2013.01); H01L 24/19 (2013.01); H01L 23/525 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/20 (2013.01); H01L 24/81 (2013.01); H01L 24/94 (2013.01); H01L 2224/02311 (2013.01); H01L 2224/02313 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/0345 (2013.01); H01L 2224/0361 (2013.01); H01L 2224/0381 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03914 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05083 (2013.01); H01L 2224/05144 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05164 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05171 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/211 (2013.01); H01L 2224/8112 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81801 (2013.01); H01L 2224/821 (2013.01); H01L 2224/82105 (2013.01); H01L 2224/94 (2013.01); H01L 2924/01022 (2013.01); H01L 2924/01024 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/01046 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/143 (2013.01); H01L 2924/181 (2013.01);
Abstract

Embodiments of the present disclosure are directed towards a method of assembling an integrated circuit package. In embodiments the method may include providing a wafer having an unpatterned passivation layer to prevent corrosion of metal conductors embedded in the wafer. The method may further include laminating a dielectric material on the passivation layer to form a dielectric layer and selectively removing dielectric material to form voids in the dielectric layer. These voids may reveal portions of the passivation layer disposed over the metal conductors. The method may then involve removing the portions of the passivation layer to reveal the metal conductors. Other embodiments may be described and/or claimed.


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