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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10128115 B1

PDFFull Text
Date of Patent:
Nov. 13, 2018

Filed:

Feb. 26, 2010

Method of forming ultra-shallow junctions in semiconductor devices

Applicants:

Chun-feng Nieh, Hsinchu, TW;

Mao-rong Yeh, Tao Yuan, TW;

Chun Hsiung Tsai, Xinpu Township, TW;

Chii-ming Wu, Taipei, TW;

Inventors:

Chun-Feng Nieh, Hsinchu, TW;

Mao-Rong Yeh, Tao Yuan, TW;

Chun Hsiung Tsai, Xinpu Township, TW;

Chii-Ming Wu, Taipei, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;

Attorney:

Hauptman Ham, LLP

Primary Examiner:

Julio J Maldonado

Assistant Examiner:

Andre' C Stevenson

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/265 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 21/26513 (2013.01); H01L 21/26506 (2013.01); H01L 21/26586 (2013.01); H01L 21/26593 (2013.01); H01L 21/823814 (2013.01); H01L 29/6659 (2013.01); H01L 29/1083 (2013.01);
Abstract

A method of forming MOS transistor includes the steps of performing a pocket implantation process on a substrate having a gate stack, performing a co-implanted ion implantation process on the substrate at a temperature less than room temperature, performing a lightly doped source/drain implantation process on the substrate, and forming source and drain regions in the substrate, adjacent the gate stack.

Find Patent Forward Citations

Nieh, Chun-Feng. (2018). Method of forming ultra-shallow junctions in semiconductor devices (U.S. Patent No. 10128115). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10128115

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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