The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 16, 2018
Filed:
Jan. 07, 2014
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Kai-Chun Hsu, Yonghe, TW;
Shyh-Fann Ting, Tainan, TW;
Jhy-Jyi Sze, Hsin-Chu, TW;
Chun-Tsung Kuo, Tainan, TW;
Ching-Chun Wang, Tainan, TW;
Dun-Nian Yaung, Taipei, TW;
Taiwan Semiconductor Manufacturing Company Limited, Hsin-Chu, TW;
Abstract
A semiconductor arrangement and method of formation are provided herein. A semiconductor arrangement includes an active area on a substrate, where the active area is at least one of a p-type region or an n-type region. The substrate includes a well, where the well is a p-well when the active area is a p-type region, and the well is an n-well when the active area is an n-type region. The well includes a photodiode. The active area is connected to a voltage supply having a voltage level, such as ground. The active area on the substrate increases a distance between the photodiode and the active area, which reduces junction leakage as compared to a semiconductor arrangement where the active area is formed at least partially within the substrate.