The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 02, 2018

Filed:

Jul. 27, 2016
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Jie Sun, Boise, ID (US);

Zhenyu Lu, Boise, ID (US);

Roger W. Lindsay, Boise, ID (US);

Brian Cleereman, Boise, ID (US);

John Hopkins, Meridian, ID (US);

Hongbin Zhu, Boise, ID (US);

Fatma Arzum Simsek-Ege, Boise, ID (US);

Prasanna Srinivasan, Boise, ID (US);

Purnima Narayanan, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01); H01L 27/11582 (2017.01); H01L 27/11556 (2017.01); H01L 27/11524 (2017.01); H01L 29/66 (2006.01); H01L 29/788 (2006.01); G11C 16/04 (2006.01); H01L 27/1157 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); G11C 16/0483 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 29/66825 (2013.01); H01L 29/7889 (2013.01);
Abstract

Methods for forming a string of memory cells, apparatuses having a string of memory cells, and systems are disclosed. One such method for forming a string of memory cells forms a source material over a substrate. A capping material may be formed over the source material. A select gate material may be formed over the capping material. A plurality of charge storage structures may be formed over the select gate material in a plurality of alternating levels of control gate and insulator materials. A first opening may be formed through the plurality of alternating levels of control gate and insulator materials, the select gate material, and the capping material. A channel material may be formed along the sidewall of the first opening. The channel material has a thickness that is less than a width of the first opening, such that a second opening is formed by the semiconductor channel material.


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